ordering number : enn * 7375 21604tn (ot) no. 7375-1/8 overview the stk403-400 series products are audio power amplifier hybrid ics that consist of optimally-designed discrete component power amplifier circuits that have been miniaturized using sanyos unique insulated metal substrate technology (imst). the adoption of a newly- developed low thermal resistance substrate allows this product to integrate six power amplifier channels in a single compact package. the adoption of a standby circuit in this device allows it to reduce impulse noise significantly as compared to earlier sanyo products, in particular, the stk402-*00 series products. features ? series of pin compatible power amplifiers ranging from 30 w/ch to 45 w/ch (10%/1 khz) devices. the same printed circuit board can be used depending on the output power grade. ? miniature packages 78.0 mm 32.0 mm 9.0 mm * *: not including the pins. ? output load impedance: r l = 6 ? allowable load shorted time: 0.3 seconds ? supports the use of standby and muting circuits. package dimensions unit: mm 4202-sip28 preliminary sanyo: sip28 [STK403-440] STK403-440 sanyo electric co.,ltd. semiconductor company tokyo office tokyo bldg., 1-10, 1 chome, ueno, taito-ku, tokyo, 110-8534 japan six-channel class ab audio power amplifier ic 25 w 6 channels thick-film hybrid ic any and all sanyo products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircrafts control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. consult with your sanyo representative nearest you before using any sanyo products described or contained herein in such applications. sanyo assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo products described or contained herein.
no. 7375- 2 /8 STK403-440 item type no. stk403-430 STK403-440 stk403-450 output 1 (10%/1 khz) 30 w 6 ch 40 w 6 ch 45 w 6 ch output 2 (0.6%/20 hz to 20 khz) 20 w 6 ch 25 w 6 ch 30 w 6 ch maximum supply voltage (no signal) 36 v 38 v 40 v maximum supply voltage (6 ) 34 v 36 v 38 v recommended supply voltage (6 ) 23 v 26 v 28 v package 78.0 mm 32.0 mm 9.0 mm series organization specifications maximum ratings at ta = 25 c these products are organized as a series based on their output capacity. operating characteristics at tc = 25 c, r l = 6 (noninductive load), rg = 600 , vg = 30 db notes: 1. 1ch drive 2. unless otherwise noted, use a constant-voltage supply for the power supply used during inspection. 3. the output noise voltage values shown are peak values read with a vtvm. however, an ac stabilized (50 hz) power supply shoul d be used to minimize the influence of ac primary side flicker noise on the reading. 4. use the transformer power supply circuit shown in the figure below for allowable load shorted time measurement and output n oise voltage measurement. 5. design applications so that the minus pre-v cc line (pin 17) is at the lowest potential at all times. 6. a limiting resistor that assures that the maximum operating current flowing into the standby pin (pin 23) does not exceed th e maximum rating must be included in application circuits. this ic operates when a voltage higher than v be (about 0.6 v) is applied to the standby pin. 4700 f 4700 f dba30c 500 500 +v cc - -v cc + + designated transformer power supply (rp-25 equivalent) parameter symbol conditions ratings unit maximum supply voltage (no signal) v cc max(0) 38 v maximum supply voltage v cc max(1) r l 3 6 36 v minimum operating supply voltage v cc min 10 v maximum operation flow-in current (pin 23) i st off max 1.2 ma thermal resistance q j -c per power transistor 3.6 c/w junction temperature tj max both the tj max and the tc max conditions must be met. 150 c operating ic substrate temperature tc max 125 c storage temperature tstg C30 to +125 c allowable load shorted time * 4 ts v cc = 26.0 v, r l = 6 , f = 50 hz, p o = 25 w, 1ch drive 0.3 s parameter symbol conditions * 1 ratings unit v cc (v) f (hz) p o (w) thd (%) min typ max p o (1) 26.0 20 to 20 k 0.6 23 25 output power * 1 p o (2) 26.0 1 k 10 40 w thd (1) 26.0 20 to 20 k 5.0 vg = 30 db 0.6 total harmonic distortion * 1 thd (2) 26.0 1 k 5.0 vg = 30 db 0.03 % frequency characteristics f l , f h 26.0 1.0 +0 C3 db 20 to 50 k hz input impedance ri 26.0 1 k 1.0 55 k output noise voltage * 2 v no 31.0 rg = 2.2 k 1.0 mvrms quiescent current i cco 31.0 no loading 60 110 180 ma neutral voltage v n 31.0 C70 0 +70 mv current flowing into pin 23 i st on 26.0 v 23 = 5 v, current limiting 0 ma in standby mode * 6 resistance: 6.2 k current flowing into pin 23 i st off 26.0 0.4 1.2 ma in operating mode * 6
no. 7375- 3 /8 STK403-440 internal equivalent circuit 11 5 6 7 8 9 23 19 18 2 3 4 1 10 12 13 16 15 pre dr iv er ic (ch2 / ch3) pre dr iv er ic (ch1) bias circuit 24 25 26 27 28 pre dr iv er ic (ch5 / ch6) 22 21 20 17 14 pre dr iv er ic (ch4) itf02247 c13 tr7 tr8 tr17 sub tr16 c16 c12 tr4 tr5 c15 tr13 tr14 c11 tr1 tr2 c14 tr10 tr11 tr9 r24 r25 tr6 r22 r23 tr3 r20 r21 r5 r6 r3 r4 r1 r2 tr12 r27 r26 tr15 r29 r28 tr18 r31 r30 r8 r7 r10 r9 r12 r11 c3 c2 c1 c4 c5 c6
no. 7375- 4 /8 STK403-440 sample application circuit 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 stk403-400 ser ies ch1 out +pre - -pre ch1 in ch1 nf ch2 nf ch2 in ch3 in ch3 nf ch3 out ch2 out +v cc - -v cc - -v cc +v cc ch4 out ch5 out sub gnd gnd sub +pre ch4 in ch4 nf bias (st -by) ch5 nf ch5 in ch6 in ch6 nf ch6 out ch6 in ch1 in ch2 in ch3 in ch5 in ch4 in 1 k 2.2 f 3 f 0.1 f 10 f 100 f 1 k 2.2 f 1 k 2.2 f 56 k 470 pf 1 k 2.2 f 56 k 470 pf 1 k 2.2 f 56 k 470 pf 1 k 2.2 f 56 k 470 pf 56 k 1.8 k 3 k 3 k 3 k 6.2 k 10 f 1.8 k 10 f 470 f 470 f 1.8 k 10 f 1.8 k 10 f 1.8 k 10 f 1.8 k 56 k 56 k 56 k 100 470 pf 4.7 4.7 3 f 0.1 f 4.7 4.7 4.7 3 f 0.1 f 4.7 3 f 0.1 f 4.7 4.7 4.7 3 f 0.1 f 4.7 4.7 3 f 0.1 f 4.7 3 pf 3 pf 56 k 3 pf 56 k 3 pf 56 k 3 pf 3 pf 56 k 470 pf 220 pf 220 pf 220 pf 3 k 3 k 3 k 220 pf 220 pf 220 pf + + + + + + + + + + + + + + + stand-b y control * ch6 out ch5 out ch4 out - -v cc +v cc ch2 out ch3 out ch1 out itf02248 * : use a v alue f or the limiting resistor that assures that the maxim um oper ating current flo wing into the standb y pin (pin 23) does not e xceed the maxim um r ating.
no. 7375- 5 /8 STK403-440 thermal design example the heat sink thermal resistance, q c-a, required to handle the total power dissipated within this hybrid ic is determined as follows. condition 1: the ic substrate temperature tc must not exceed 125 c. pd q c-a + ta < 125 c ... (1) ta: guaranteed ambient temperature for the end product. condition 2: the junction temperature of each transistor must not exceed 150 c. pd q c-a + pd/n q j-c + ta < 150 c ... (2) n: number of power transistors q j-c: thermal resistance per power transistor we take the power dissipation in the power transistors to be pd evenly distributed across those n power transistors. if we solve for q c-a in equations (1) and (2), we get the following inequalities. q c-a < (125 C ta)/pd ... (1) q c-a < (150 C ta)/pd C q j-c/n ... (2) values that satisfy both these inequalities at the same time are the required heat sink thermal resistance values. determining the following specifications allows us to obtain the required heat sink thermal resistance from inequalities (1) and (2). ? supply voltage: v cc ? load resistance: r l ? guaranteed ambient temperature: ta example: assume that the ic supply voltage, v cc , is 26 v, r l is 6 , and that the signal is a continuous sine wave. in this case, from the pd C p o characteristics, the maximum power will be 134 w for a signal with a frequency of 1 khz. for actual music signals, it is usual to use a pd of 1/8 of p o max, which is the power estimated for continuous signals in this manner. (note that depending on the particular safety standard used, a value somewhat different from the value of 1/8 used here may be used.) that is: pd = 85 w (when 1/8 p o max is 3.1 w) the number, n, of power transistors in the hybrid ic's audio amplifier block is 12. since the thermal resistance, q j-c, per transistor is 3.6 c/w, the required heat sink thermal resistance, q c-a, for a guaranteed ambient temperature of 50 c will be as follows. from inequality (1): q c-a < (125 C 50)/85 < 0.88 from inequality (2): q c-a < (150 C 50)/85 C 3.6/12 < 0.87 therefore, the thermal resistance that satisfies both these expressions at the same time is 0.87 c/w. note that this thermal design example assumes the use of a constant-voltage power supply, and is only provided as an example for reference purposes. thermal designs must be tested in an actual end product.
no. 7375- 6 /8 STK403-440 stand-by & mute sample application circuit 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 stk403-400 ser ies ch1 out +pre - -pre ch1 in ch1 nf ch2 nf ch2 in ch3 in ch3 nf ch3 out ch2 out +v cc - -v cc - -v cc +v cc ch4 out ch5 out sub gnd gnd sub +pre ch4 in ch4 nf bias (st -by) ch5 nf ch5 in ch6 in ch6 nf ch6 out ch6 in ch1 in ch2 in ch3 in ch5 in ch4 in 10 k 10 k 10 k 2.2 k 10 k + + + + + + + + + + + + + + + + ch6 out ch5 out ch4 out - -v cc +v cc ch2 out ch3 out ch1 out itf02249 * : use a v alue f or the limiting resistor that assures that the maxim um oper ating current flo wing into the standb y pin (pin 23) does not e xceed the maxim um r ating. 10 k 10 k 10 k 2.2 k 10 k 3 k 33 k 2 k 33 f 6.2 k mute control h : single m ute l : nor mal mute control h : single m ute l : nor mal * stand-b y control h : oper ation l : stand-b y stand-b y control mute control +5 +5 st -by st -by pla y mute mute
no. 7375- 7 /8 STK403-440 standby mode control 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 stk403-400 ser ies ch1 out +pre - -pre ch1 in ch1 nf ch2 nf ch2 in ch3 in ch3 nf ch3 out ch2 out +v cc - -v cc - -v cc +v cc ch4 out ch5 out sub gnd gnd sub +pre ch4 in ch4 nf bias (st -by) ch5 nf ch5 in ch6 in ch6 nf ch6 out + itf02250 3 k 33 k 2 k 33 f / 10 v 6.2 k * stand-b y control h : oper ation mode (+5 v) l : stand-b y mode (0 v) r1 i st = (applied v oltage v be 2) / r1 = (5- -0.6 2) / 6.2 k 0.63 (ma) current flowing in i st itf02263 v : 200 mv / 1div t : 100 ms / 1div off (stand-b y mode) on (oper ation mode) 0.1 v 0.16 v applied v oltage (v st ) .................. current flo wing into pin 23 (i st ) ... an inter nal tr ansistor tur ns on when a v oltage o v er 0.6 v is applied and the ic enters into oper ating mode . use a v alue f or the limiting resistor that assures that the maxim um oper ating current flo wing into this pin due to the control v oltage applied b y the microcontroller or other circuit does not e xceed the maxim um r ating. ? impulse noise that occurs at power on and power off can be reduced significantly by using a standby circuit. ? end product design is made easier by using a limiting resistor ( * ) to match the control voltage provided by the microcontroller or other control circuit. ? standby control is available by controlling the current (i st ) flowing into the standby pin (pin 23).
ps no. 7375- 8 /8 STK403-440 this catalog provides information as of february, 2004. specifications and information herein are subject to change without notice. specifications of any and all sanyo products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customers products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customers products or equipment. sanyo electric co., ltd. strives to supply high-quality high-reliability products. however, any and all semiconductor products fail with some probability. it is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of sanyo electric co., ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equipment, refer to the delivery specification for the sanyo product that you intend to use. information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. sanyo believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. t h d p o i t f 0 2 2 5 5 1 . 0 0 . 1 7 5 0 . 1 0 . 0 1 3 7 5 3 2 7 5 3 2 2 2 1 . 0 1 0 2 3 5 2 3 5 7 7 2 3 5 7 1 0 p d p o i t f 0 2 2 5 6 0 1 . 0 0 . 1 1 6 0 1 2 0 1 4 0 8 0 1 0 0 6 0 2 0 4 0 2 3 5 7 2 3 5 2 3 5 7 7 1 0 p o v c c o u t p u t p o w e r , p o w s u p p l y v o l t a g e , v c c v i t f 0 2 2 5 7 4 0 5 0 6 0 7 0 0 1 0 2 0 3 0 1 0 1 4 1 8 2 2 2 6 3 0 3 4 3 8 v c c = 2 6 v r l = 6 v g = 3 0 d b r g = 6 0 0 t c = 2 5 c 6 c h d r i v e r l = 6 f = 1 k h z v g = 3 0 d b r g = 6 0 0 t c = 2 5 c 6 c h d r i v e t h d = 1 0 % t h d = 0 . 6 % f = 2 0 k h z , t h d = 0 . 6 % t o t a l h a r m o n i c d i s t o r t i o n , t h d % o u t p u t p o w e r , p o w t o t a l d e v i c e p o w e r d i s s i p a t i o n , p d w o u t p u t p o w e r , p o w p o f o u t p u t p o w e r , p o w f r e q u e n c y , f h z i t f 0 2 2 5 8 1 k 1 0 1 0 0 5 0 2 0 3 0 4 0 2 3 5 7 2 3 5 7 2 3 5 7 2 3 1 0 k t h d = 1 0 % t h d = 0 . 6 % v c c = 2 6 v , r l = 6 v g = 3 0 d b , r g = 6 0 0 t c = 2 5 c 6 c h d r i v e v c c = 2 6 v r l = 6 f = 1 k h z v g = 3 0 d b r g = 6 0 0 t c = 2 5 c 6 c h d r i v e ( s a m e o u t p u t r a t i n g ) f = 2 0 k h z f = 1 k h z
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